Marcelo Siero received a BSc in Electrical Engineering, from CSULB, an MS in Computer Engineering from the UCSC and is currently working on a PhD at UCSC. Early in his career he worked on the design of a VLSI version of the HP3000 computer at Hewlett Packard, development of a graphics accelerating processor at Xerox PARC, and development of an advanced Pascal compiler at National Semiconductor. He led the development of an early Email and Netnews System for his own ISP startup in early 90’s. He has also been a self-employed consultant since then for Silicon Valley, primarily focusing in design CAD, verification and performance based tools, and GPU architecture for deep Neural Net training. He is currently working on a PhD in Computer Engineering, focusing in the creation of low-power accelerated Deep Neural Network architectures bypassing expensive GPUs for AI training, and and that could be used for numerous applications but particularly applying to performing high-quality end-to-end speech Synthesis. Marcelo is the current chair and has been a long standing volunteer for the Monterey Bay Subsection of IEEE. Marcelo is proficient in Python, Octave, Theano, TensorFlow, R, Matlab, Fortran 90, C++, C#, Objective C, Java, Mathematica, LaTeX, Groovy, Keras, VB, and LISP.